1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method for the same, in particular, to a flexible semiconductor device and manufacturing method for the same.
2. Description of the Background Art
The trend toward miniaturization and greater portability of apparatuses such as cellular phones has been increasing and, in addition, wearable computers have appeared that are “personal computers that can be worn on a human body.”
In addition, interfaces for directly sensing images and sounds, such as a 3DMD (see-through head-mounted display), a CCD camera with a built-in HD, an earphone-type monocle, an earphone-type microphone have been proposed and the market for wearable apparatuses is expected to expand in the future.
A method wherein a TFT chip of an AMLCD (active matrix display) can be formed within a thin film has been proposed as one of the measures necessary to meet this demand (for example, in U.S. Pat. No. 5,256,562).
According to this method, first, as shown in FIG. 5(a), an SOI structure substrate is prepared by layering, in the following order, a Si buffer layer 41, a silicon oxide film 42 according to a CVD method, a release layer 43 formed of a silicon oxide nitride film and an upper silicon layer 44 that becomes an element formation layer on a Si substrate 40 and, as shown in FIG. 5(b), a pixel region 44b as well as a TFT region 44a of an AMLCD are formed.
Next, as shown in FIG. 5(c), an insulator region 45 is formed and an oxide film 46 is formed on pixel region 44b and on TFT region 44a. 
Furthermore, as shown in FIG. 5(d), a gate electrode 48 and source/drain regions 49 are formed in the gained substrate and, in addition, these are covered with an insulating film 50 and, then, contact holes and wires 51 are created in desired regions of insulating film 50 so that a TFT 47 is gained.
After that, as shown in FIG. 5(e), an opening 52a is created in the release layer 43 outside of the region that includes pixel region 44b and TFT region 44a and, furthermore, an opening 52b, which is larger than this opening 52a, is created in the silicon oxide film 42.
Subsequently, as shown in FIG. 5(f), a support pillar 53 that fills in the openings of the silicon oxide film 42 and the release layer 43 is formed of a silicon oxide film, and an etchant introduction opening 54 is created in the release layer 43 in the region between the support pillars 53 other than the regions of the pixel region 44b and the TFT region 44a so that an etchant is introduced through this etchant introduction opening 54 and, thereby, the silicon oxide film 42 is etched and removed so as to create a cavity 55, as shown in FIG. 5(g). Thereby, the pixel region 44b and the TFT 47 are placed on the release layer 43, supported by the support pillar 53.
Next, as shown in FIG. 5(h), an epoxy resin 56 and a non-photosensitive transparent resin film 57 are formed on the entire surface of the gained substrate and, then, the epoxy resin 56, which is over the pixel region 44b and the TFT 44a, is hardened through irradiation by ultraviolet rays and the epoxy resin that is not hardened is removed so that a chip in a thin film form is released by a cleaving action of the support pillar 53.
A chip in a thin film form fabricated in the above described manner, however, lacks flexibility, lacks ductility and is fragile. In addition, it is difficult to apply such a chip in a layered structure used for a system having multiple functions.